Cascode circuit device with improved reverse recovery characteristic

ABSTRACT

A semiconductor device including: an FET; a MOSFET having a drain thereof connected with a source of the FET; a resistor having one end thereof connected with a gate of the FET and having the other end thereof connected with a source of the MOSFET; and a diode having an anode thereof connected with the gate of the FET and having a cathode thereof connected with the source of the MOSFET.

This application is a Divisional of co-pending application Ser. No.13/459,993 filed on Apr. 30, 2012, which claims priority under 35 U.S.C.§119 to Application No. 2011-103529 filed in Japan on May 6, 2011, theentire contents of which are hereby incorporated by reference.

TECHNICAL FIELD

The present invention relates to a semiconductor device and anelectronic device. Particularly, the present invention relates to asemiconductor device and an electronic device, each of which includes anormally-on type field-effect transistor.

BACKGROUND ART

A group III nitride semiconductor, whose typical examples are galliumnitride (GaN), AlGaN, InGaN, and the like, is advantageous as amaterial. As such, in a case where the group III nitride semiconductoris used as a power device, it is possible to anticipate good deviceproperties such as high withstand voltage, high-speed operation, highheat-resistance, and low on-resistance. Because of this, in place of aconventional Si-material power device whose properties as a power devicehave come close to the limit, development of a power device in which thegroup III nitride semiconductor is utilized has been conducted.

Particularly, with regard to a field-effect transistor (FET), atransistor with a high electron mobility can be realized by causing ahigh-density two dimensional electron gas (2DEG) to be formed near aheterojunction interface between, for example, AlGaN and GaN. That is,it is possible to further reduce an on-resistance of the FET. There havebeen provided various device structures in which such a heterojunctioninterface is utilized.

Such a GaN FET is usually of a normally-on type which has a negativethreshold voltage and, when a gate voltage is 0 V (zero volt), isbrought into an on-state, in which a drain current flows.

In contrast, as to, for example, a metal-oxide semiconductorfield-effect transistor (MOSFET) and an insulated gate bipolartransistor (IGBT), a normally-off type is the mainstream. A normally-offtype transistor has a positive threshold voltage and, when a gatevoltage is 0 V, is brought into an off-state, in which no drain currentflows.

A normally-on type GaN FET has good properties such as high withstandvoltage, high-speed operation, high heat-resistance, and lowon-resistance. However, since it is necessary to supply a negativevoltage to a gate in the normally-on type GaN FET, presence of anegative voltage supply source causes an increase in cost and anincrease in circuit size in a case where the normally-on type GaN FET isused.

In order to use a GaN FET as a normally-off type FET, it is necessary toconnect a normally-on type field-effect transistor with a normally-offtype MOSFET by a connection technique called cascode connection. A powersemiconductor device, in which a normally-off operation is achieved inthis manner, has been well known. Since a MOSFET with low withstandvoltage can be used as the normally-off type MOSFET, it is possible tominimize an increase in cost and a deterioration in property.

For example, Non-patent Literature 1 discloses a method of controlling,for the purpose of achieving EMC (electromagnetic compatibility), dv/dtin a cascode circuit in which a normally-on type SiC JFET (JunctionField-Effect Transistor) is cascode-connected with a MOSFET.Specifically, Cdg, M is added as illustrated in (a) of FIG. 9 or (i) Rd,(ii) Cdg, J, and (iii) Rgs are added as illustrated in (b) of FIG. 9, sothat a time constant of a negative feedback at the time of a switchingoperation is changed. Thus dv/dt is controlled.

Note that Cdg, M in a circuit diagram illustrated in (a) of FIG. 9 and(i) Cdg, J and (ii) Rgs in a circuit diagram illustrated in (b) of FIG.9 are variable because of an experiment for showing that dv/dt can becontrolled by causing a capacitance or a resistance to change. Cdg, M,Cdg, J, and Rgs do not have to be variable. By determining, at the timeof designing, the time constant of the negative feedback appropriatelyin accordance with a drain-gate capacitance or an internal gateresistance, a voltage change rate dv/dt which provides a good balancebetween (i) electric power efficiency which varies in accordance withswitching loss and (ii) noise is achieved.

Non-patent Literature 2 discloses a cascode circuit in which anormally-on type SiC JFET is cascode-connected with a MOSFET. It is alsodisclosed that a reverse recovery current, which flows in a directionfrom a drain to a source when an electric current in a direction fromthe source toward the drain is shut off, is large in the cascodecircuit. Non-patent Literature 2 further discloses a control method forpreventing a large reverse current, as well as a control method which isemployed in a circuit different from the cascode circuit.

Further, Patent Literature 1 discloses a semiconductor device which canachieve a normally-off operation and prevent an increase inmanufacturing cost.

Still further, Patent Literature 2 discloses a power semiconductordevice which reduces a switching loss caused by a reverse recoverycurrent.

CITATION LIST Patent Literature

-   Patent Literature 1-   Japanese Patent Application Publication, Tokukai, No. 2011-29386 A    (Publication Date: Feb. 10, 2011)-   Patent Literature 2-   Japanese Patent Application Publication, Tokukai, No. 2006-158185 A    (Publication Date: Jun. 15, 2006)

Non-Patent Literature

-   Non-patent Literature 1-   “Controllable dv/dt Behaviour of the SiC MOSFET/JFET Cascode An    Alternative Hard Commutated Switch for Telecom Applications” Applied    Power Electronics Conference and Exposition 2010-   Non-patent Literature 2-   “CASCODE LIGHT—normally-on JFET stand alone performance in a    normally-off Cascode circuit” Power Conversion/Intelligent Motion    (PCIM) Europe 2010

SUMMARY OF INVENTION Technical Problem

However, in the configuration described in Non-patent Literature 2, itis necessary to supply a negative voltage so as to turn off thenormally-on type JFET. A negative power source is therefore required,and a manufacturing cost is increased, accordingly.

In a case where a reverse recovery characteristic is improved in acascode circuit in which a normally-on type SiC JFET iscascode-connected with a MOSFET as described in Non-patent Literature 2,EMC is deteriorated.

The following description will discuss measurement of a reverse recoverycharacteristic, with reference to FIG. 10.

(Experiment for Measuring Reverse Recovery Characteristic)

(Measuring Device 130)

FIG. 10 is a circuit diagram of a measuring device 130 for measuring(assessing) a reverse recovery characteristic of a subject 121 to beevaluated. The measuring device 130 includes a voltage source V130, acapacitor C130, an ammeter I130, a coil L130, a signal generator OS130,and a device FET 125.

The subject 121 to be evaluated is a conventional semiconductor device121′ (that is, a composite element) illustrated in FIG. 11 and includesa normally-on type FET 123, a normally-off type MOSFET 124, and aresistor R121.

The normally-on type FET 123 and the normally-off type MOSFET 124 arecascode-connected with each other via the resistor R121.

Note that a gate of the normally-off type MOSFET 124 will be referred toas a gate of the semiconductor device 121′. Likewise, a source of thenormally-off type MOSFET 124 will be referred to as a source of thesemiconductor device 121′. A drain of the normally-on type FET 123 willbe referred to as a drain of the semiconductor device 121′.

In the subject 121 to be evaluated (i.e., the semiconductor device121′), the gate of the MOSFET 124 and the source of the MOSFET 124 areshort-circuited. In this case, the source of the MOSFET 124 functions asan anode of a diode and a drain of the MOSFET 124 functions as a cathodeof the diode. Accordingly, the MOSFET 124 exhibits diodecharacteristics. The subject 121 to be evaluated also exhibits diodecharacteristics because of a cascode connection. The circuit illustratedin FIG. 10 is a circuit for measuring a reverse recovery characteristicof the subject 121 to be evaluated.

In the measuring device 130 illustrated in FIG. 10, an output (+) of thevoltage source V130 is connected with each of one end of the capacitorC130, an output of the ammeter I130, and one end of the coil L130. Theother end of coil L130, one end of the resistor R121, the source of theMOSFET 124, the gate of the MOSFET 124, and a drain of the device FET125 are connected with one another.

The other end of the resistor R121 is connected with a gate of the FET123. A source of the FET 123 is connected with the drain of the MOSFET124. The drain of the FET 123 is connected with an input of the ammeterI130.

An input (−) of the voltage source V130, the other end of the capacitorC130, and a source of the device FET 125 are electrically grounded.

(Measurement of Reverse Recovery Characteristic)

The following description will discuss measurement of a reverse recoverycharacteristic carried out by use of the circuit illustrated in FIG. 10.

First, in a measuring circuit illustrated in FIG. 10, a high levelsignal is supplied from the signal generator OS130 to a gate of thedevice FET 125 so as to turn on the device FET 125. This causes a powersupply voltage (an output voltage of the voltage source V130) to causean electric current to flow through the coil L130. Meanwhile, thesubject 121 to be evaluated is in an off-state. That is, both of twoFETs in the subject 121 to be evaluated are in an off-state.

In a case where the device FET 125 is turned off in a state in which theelectric current flows through the coil L130, an electric potential ofthe drain of the device FET 125 (i.e., an electric potential of thesource of the semiconductor device 121′) increases.

When the electric potential of the source of the semiconductor device121′ becomes substantially equal to the power supply voltage, thenormally-on type FET 123 conducts. Note that the normally-off typeMOSFET 124 is still off in this state.

When the electric potential of the source of the semiconductor device121′ increases to about a voltage equal to a sum of (i) a forwardvoltage of a body diode of the normally-off type MOSFET 124 and (ii) thepower supply voltage, the body diode is turned on, so that the subject121 to be evaluated is turned on. In response to the subject 121 to beevaluated being turned on, an electric current is regenerated, so thatthe electric potential of the source of the semiconductor device 121′stops increasing. A flow of a regenerated current which is regeneratedwhen the subject 121 to be evaluated is turned on takes the followingroute: the one end of the coil L130→the other end of the coil L130→thesource of the MOSFET 124→the drain of the MOSFET 124→the source of theFET 123→the drain of the FET 123→the ammeter I130.

This is an early stage of the measurement of the reverse recoverycharacteristic.

In order to measure the reverse recovery characteristic, the device FET125 is turned on again in a state in which the regenerated currentflows. This causes a sharp decrease in the regenerated current flowingin the subject 121 to be evaluated. A rate of decrease of theregenerated current is di/dt.

When the regenerated current becomes zero, an electric current that isreverse to the regenerated current (i.e., a reverse recovery current)flows. A flow of the reverse recovery current takes the following route:the ammeter I130→the drain of the FET 123→the source of the FET 123→thedrain of the MOSFET 124→the source of the MOSFET 124→the drain of thedevice FET 125→the source of the device FET 125→the ground (GND).

At the same time as the body diode of the MOSFET 124 is turned off(i.e., recovers), the electric potential of the drain of the device FET125 (i.e., the electric potential of the source of the semiconductordevice 121′) starts to decrease. Decrease in electric potential of thesource of the semiconductor device 121′ causes the body diode of theMOSFET 124 to be turned off. This causes an increase in drain-sourcevoltage of the MOSFET 124.

When a gate-source voltage of the FET 123 exceeds a negative thresholdvoltage and approaches 0 V, the FET 123 is turned off.

The electric potential of the drain of the device FET 125 (i.e., theelectric potential of the source of the semiconductor device 121′)decreases to a ground voltage. To be exact, the electric potential ofthe drain of the device FET 125 (i.e., the electric potential of thesource of the semiconductor device 121′) decreases to an on-voltage ofthe device FET 125.

In this manner, it is possible to observe the reverse recovery currentfrom a time when the subject 121 to be evaluated is in an on-state untilthe subject 121 to be evaluated is turned off. That is, it is possibleto measure the reverse recovery characteristic of the subject 121 to beevaluated.

(Electric Current Flowing after Regeneration)

The following description will additionally discuss an electric currentthat flows after the regeneration occurs. In a case where the device FET125 is turned on in a state in which the regenerated current flows, anelectric current that flows through the coil L130 changes from (i) theregenerated current to (ii) a device FET current, which flows throughthe device FET 125. Note that, in a case where diodes in the circuitillustrated in FIG. 10 are ideal diodes, the regenerated current remainszero after it becomes zero.

Immediately after the electric current changes, that is, immediatelyafter the regenerated current becomes zero, an electric current flowsfrom the drain of the MOSFET 124 to the source of the MOSFET 124. Thisis because the body diode of the MOSFET 124 has not recovered (has notbeen turned off) yet.

While the electric current that flows through the coil L130 changes fromthe regenerated current to the device FET current, the FET 123 remainsin an on-state.

When the body diode of the MOSFET 124 is turned off, a charging currentflows into an output capacitance (drain-source parasitic capacitance) ofthe MOSFET 124. Meanwhile, the FET 123 remains in the on-state.

Now, the following description will discuss a case in which an internalgate resistance of the MOSFET 124 is small. When the drain-sourcevoltage of the MOSFET 124 exceeds an absolute value of the thresholdvoltage of the FET 123 (since the FET 123 is of a normally-on type, thethreshold voltage is a negative voltage), the FET 123 is turned off, sothat a charging current flows. When charging is finished, that is, whenthe electric potential of the drain of the device FET 125 decreases to aground potential, the charging current becomes zero.

In contrast, the following description will discuss a case in which theinternal gate resistance of the MOSFET 124 is large. As the drain-sourcevoltage of the MOSFET 124 increases, an absolute value of thegate-source voltage (negative voltage) of the FET 123 decreases(approaches 0 V) with a delay caused in accordance with a time constantdetermined based on the internal gate resistance and an inputcapacitance of the FET 123. Due to the delay, the drain-source voltageof the MOSFET 124 exceeds a breakdown voltage before the absolute valueof the gate-source voltage of the FET 123 becomes not more than athreshold. As a result, a breakdown current, which is a currentdifferent from the charging current, flows through the MOSFET 124.

When the absolute value (negative voltage) of the gate-source voltage ofthe FET 123 becomes equal to or lower than the threshold, the FET 123turns off, so that a charging current flows. When the charging isfinished, that is, when the electric potential of the drain of thedevice FET 125 decreases to the ground potential, the charging currentbecomes zero.

The electric current which starts flowing after the regenerated currentbecomes zero and keeps flowing until the charging is finished is thereverse recovery current.

It is difficult to make a clear distinction between the reverse recoverycurrent and the charging current. The charging current is included inthe scope of the reverse recovery current.

(Problem of Conventional Invention)

The following description will summarize problems of the conventionalinvention. As early described, the invention in accordance withNon-patent Literature 2 has a problem that the manufacturing costincreases due to addition of the negative power source.

Next, Non-patent Literature 1 describes that a semiconductor deviceconfigured by use of cascode connection has a poor reverse recoverycharacteristic. In order to merely improve the reverse recoverycharacteristic, it is only necessary that a resistance of the resistorR121 be reduced in the subject 121 to be evaluated illustrated in FIG.10 so that the subject 121 to be evaluated is turned off quickly.However, as the resistance of the resistor R121 is reduced, the turningon of the subject 121 to be evaluated also becomes faster. Thisdeteriorates EMC as described in Non-patent Literature 1.

FIG. 12 is a waveform chart showing that a reduction in resistance ofthe resistor R121 causes a reduction in reverse recovery current and,ultimately, causes a reduction in reverse recovery time. (a) of FIG. 12is a waveform chart corresponding to a case in which the resistor R121has a resistance of 10Ω. (b) of FIG. 12 is a waveform chartcorresponding to a case in which the resistor R121 has a resistance of0Ω (zero ohm). As is clear from (a) and (b) of FIG. 12, a reverserecovery current Ir decreases as the resistance of the resistor R121 isreduced. Reverse recovery time tr also decreases as the resistance isdecreased.

Lastly, both of the invention in accordance with Patent Literature 1 andthe invention in accordance with Patent Literature 2 have asemiconductor device configured by use of cascode connection. As such,like the invention in accordance with Non-patent Literature 1, there isa trade-off relationship between a reverse recovery characteristic andEMC.

As describe above, a conventional semiconductor device (e.g., thesubject 121 to be evaluated) including a semiconductor device configureby use of cascode connection has either (i) an increase in manufacturingcost due to a negative power source or (ii) a trade-off relationshipbetween a reverse recovery characteristic and EMC.

The present invention is accomplished in view of the conventionalproblem. An object of the present invention is to provide asemiconductor device and an electronic device, each of which can achievea good reverse recovery characteristic and good EMC at the same time andis less expensive than a conventional semiconductor device.

Solution to Problem

In order to achieve the object, a semiconductor device of the presentinvention is a semiconductor device including: a first field-effecttransistor being of a normally-on type; a second field-effect transistorbeing of a normally-off type and having a drain electrode thereofconnected with a source electrode of the first field-effect transistor;a resistor having one end thereof connected with a gate of the firstfield-effect transistor and having the other end thereof connected witha source of the second field-effect transistor; and a diode having ananode thereof connected with the gate of the first field-effecttransistor and having a cathode thereof connected with the source of thesecond field-effect transistor.

According to the invention, the semiconductor device includes the diode.As such, in the two field-effect transistors (the first field-effecttransistor and the second field-effect transistor) cascode-connectedwith each other, a gate drive current flows through the diode inpriority to the resistor when an electric current flowing through thesecond field-effect transistor is turned off.

The gate drive current flows in (i) the following route: the drain ofthe first field-effect transistor→a drain-gate parasitic capacitance ofthe first field-effect transistor→the gate of the first field-effecttransistor→the diode→the source of the second field-effect transistorand (ii) the following route: the source of the first field-effecttransistor→a gate-source parasitic capacitance of the first field-effecttransistor→the gate of the first field-effect transistor→the diode→thesource of the second field-effect transistor.

This allows the semiconductor device to be turned off more speedily thana conventional semiconductor device. That is, switching speed of thesemiconductor device increases.

Accordingly, time in which the reverse recovery current flows in thesemiconductor device is shorter than that in the conventionalsemiconductor device. As a result, it becomes possible to achieve a goodreverse recovery characteristic.

Since the semiconductor device includes the diode, it is not necessaryto reduce, for the purpose of improving the reverse recoverycharacteristic, a resistance of the resistor connected in parallel withthe diode. That is, it is only necessary that the resistance of theresistor be set to a value that is large enough to achieve good EMC(Electromagnetic Compatibility) (that is, not so large as to increaseswitching loss too much). This makes it possible to achieve good EMC andreduce the switching loss in the semiconductor device.

Further, unlike the conventional semiconductor device, there is no needof providing a negative power source (a voltage source for supplying anegative voltage) in order to cause the first field-effect transistor ofa normally-on type to operate. This makes the semiconductor device lessexpensive than the conventional semiconductor device.

Therefore, it is possible to provide a semiconductor device which canachieve a good reverse recovery characteristic and good EMC at the sametime and is less expensive than the conventional semiconductor device.

In order to achieve the object, a semiconductor device of the presentinvention is a semiconductor device including: a first field-effecttransistor being of a normally-on type; a second field-effect transistorbeing of a normally-off type and having a drain thereof connected with asource of the first field-effect transistor; a resistor having one endthereof connected with a gate of the first field-effect transistor andhaving the other end thereof connected with a source of the secondfield-effect transistor; a diode having an anode thereof connected withthe gate of the first field-effect transistor; and a capacitor havingone end thereof connected with a drain of the first field-effecttransistor and having the other end thereof connected with a cathode ofthe diode.

According to the invention, the semiconductor device includes the diodeand the capacitor. As such, in the two field-effect transistors (thefirst field-effect transistor and the second field-effect transistor)cascode-connected with each other, part of a gate drive current flowsthrough the diode, the capacitor, and the resistor when an electriccurrent flowing through the semiconductor device is turned off.

The gate drive current flows in the following route: a parasiticcapacitance of the diode→the capacitor→the resistor→the source of thesecond field-effect transistor.

This allows the semiconductor device to be turned off, more speedilythan a conventional semiconductor device. That is, switching speed ofthe semiconductor device increases.

Therefore, time during which a reverse recovery current flows in thesemiconductor device is shorter than that in the conventionalsemiconductor device. Consequently, it becomes possible to achieve agood reverse recovery characteristic.

Since the semiconductor device includes the diode and the capacitor soas to cause the gate drive current to flow, it becomes unnecessary toincrease, for the purpose of achieving good EMC, a capacitance of thecapacitor. This makes it possible to achieve good EMC and reduce theswitching loss in the semiconductor device.

Further, unlike the conventional semiconductor device, there is no needof providing a negative power source (a voltage source for supplying anegative voltage) in order to cause the first field-effect transistor ofa normally-on type to operate. This makes the semiconductor device lessexpensive than the conventional semiconductor device.

Therefore, it is possible to provide a semiconductor device which canachieve a good reverse recovery characteristic and good EMC at the sametime and is less expensive than the conventional semiconductor device.

An electronic device of the present invention includes the semiconductordevice. Therefore, the electronic device of the present invention (i)can achieve a good reverse recovery characteristic and good EMC at thesame time and (ii) is less expensive than a case in which a conventionalsemiconductor device is used.

Advantageous Effects of Invention

As described above, a semiconductor device of the present invention is asemiconductor device including: a first field-effect transistor; asecond field-effect transistor having a drain thereof connected with asource of the first field-effect transistor; a resistor having one endthereof connected with a gate of the first field-effect transistor andhaving the other end thereof connected with a source of the secondfield-effect transistor; and a diode having an anode thereof connectedwith the gate of the first field-effect transistor and having a cathodethereof connected with the source of the second field-effect transistor.

As described above, a semiconductor device of the present invention is asemiconductor device including: a first field-effect transistor; asecond field-effect transistor having a drain thereof connected with asource of the first field-effect transistor; a resistor having one endthereof connected with a gate of the first field-effect transistor andhaving the other end thereof connected with a source of the secondfield-effect transistor; a diode having an anode thereof connected withthe gate of the first field-effect transistor; and a capacitor havingone end thereof connected with a drain of the first field-effecttransistor and having the other end thereof connected with a cathode ofthe diode.

Therefore, it is possible to provide a semiconductor device which canachieve a good reverse recovery characteristic and good EMC at the sametime and is less expensive than the conventional semiconductor device.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a circuit diagram of a semiconductor device in accordance withan embodiment of the present invention.

FIG. 2 is a circuit diagram of a measuring circuit for measuring areverse recovery characteristic of a semiconductor device in accordancewith an embodiment of the present invention.

FIG. 3 is a circuit diagram of a semiconductor device in accordance withanother embodiment of the present invention.

FIG. 4 is a circuit diagram of a measuring circuit for measuring areverse recovery characteristic of a semiconductor device in accordancewith another embodiment of the present invention.

FIG. 5 is a circuit diagram illustrating noise generated in a case wherea semiconductor device configured by use of cascode connection is used.

FIG. 6 is a waveform chart showing that a semiconductor device inaccordance with an embodiment of the present invention has a reverserecovery current and reverse recovery time which are reduced as comparedwith those of a conventional semiconductor device. (a) of FIG. 6 is awaveform chart of a conventional semiconductor device, and (b) of FIG. 6a waveform chart of a semiconductor device in accordance with anembodiment of the present invention.

FIG. 7 is a view showing an example of a specification of a normally-ontype FET.

FIG. 8 is a view showing an example of a specification of a normally-offtype MOSFET.

FIG. 9 is a view corresponding to FIG. 2 of Non-patent Literature 1. (a)of FIG. 9 is a circuit diagram for describing that dv/dt is controlledby adding Cdg, M so as to change a time constant of a negative feedbackat the time of switching operation. (b) of FIG. 9 is a circuit diagramfor describing that dv/dt is controlled by adding (i) Rd, (ii) Cdg, J,and (iii) Rgs so as to change a time constant of a negative feedback atthe time of switching operation.

FIG. 10 is a circuit diagram for measuring a reverse recoverycharacteristic of a subject to be evaluated.

FIG. 11 is a circuit diagram of a conventional semiconductor device tobe evaluated.

FIG. 12 is a waveform chart showing that a reduction in resistance of aresistor R121 causes a reduction in reverse recovery current and inreverse recovery time. (a) of FIG. 12 is a waveform chart correspondingto a case in which the resistor R121 has a resistance of 10Ω. (b) ofFIG. 12 is a waveform chart the resistor R121 has a resistance of 0Ω.

DESCRIPTION OF EMBODIMENTS

An embodiment of the present invention will be described below withreference to FIGS. 1, 2, and 5 through 8.

First Embodiment Configuration of Semiconductor Device 1

FIG. 1 is a circuit diagram of a semiconductor device 1 in accordancewith the present embodiment. The semiconductor device 1 (i.e., acomposite element) includes a normally-on type FET 3 (first field-effecttransistor), a normally-off type MOSFET 4 (second field-effecttransistor), a resistor Rgs, and a diode Dl.

The normally-on type FET 3 and the normally-off type MOSFET 4 arecascode-connected with each other. The normally-off type MOSFET 4 has abody diode 4 d.

The FET 3 contains a group III nitride semiconductor (compoundsemiconductor), whose typical examples are gallium nitride (GaN), AlGaN,InGaN, and the like. This allows the FET 3 to be a normally-on typefield-effect transistor and also allows high resistance to pressure,high-speed operation, high heat-resistance, and low on-resistance to beachieved in the FET 3.

Note that a gate of the MOSFET 4 will be referred to as a gate of thesemiconductor device 1 (G in FIG. 1). Likewise, a source of the MOSFET 4will be referred to as a source of the semiconductor device 1 (S in FIG.1). A drain of the FET 3 will be referred to as a drain of thesemiconductor device 1 D in (FIG. 1).

In the semiconductor device 1 illustrated in FIG. 1, the source of theMOSFET 4, an anode of the body diode 4 d, one end of the resistor Rgs,and a cathode of the diode D1 are connected with one another.

A drain of the MOSFET 4, a cathode of the body diode 4 d, and a sourceof the FET 3 are connected with one another.

The other end of the resistor Rgs, an anode of the diode D1, and a gateof the FET 3 are connected with one another.

(Operation of Semiconductor Device 1)

In the semiconductor device 1 illustrated in FIG. 1, good EMC(electromagnetic compatibility) is achieved by reducing a voltage changerate dv/dt (later described) when the semiconductor device 1 is turnedon. When the semiconductor device 1 is turned off, a good reverserecovery characteristic is achieved by speedily turning off thesemiconductor device 1 by means of the diode Dl.

Initially, with regard to achievement of good EMC by reducing thevoltage change rate dv/dt, the following description will discuss, withreference to FIG. 5, noise generated in a case where a semiconductordevice configured by use of cascode connection is used.

(Relation Between Voltage Change Rate Dv/Dt and Noise)

FIG. 5 is a circuit diagram for describing noise generated in a case ofusing a semiconductor device configured by use of cascode connection.

The circuit illustrated in FIG. 5 includes a semiconductor device 51 andan inverter circuit 52.

The semiconductor device 51 includes a high-side FET 61, a low-side FET62, an oscillation circuit 60, and a capacitor C60. A capacitance C61and a capacitance C62 are each a parasitic capacitance and will be laterdescribed. The high-side FET 61 has a body diode 61 d, and the low-sideFET 62 has a body diode 62 d.

The inverter circuit 52 includes a coil L51 and a capacitor C52. Acapacitance C51 is a parasitic capacitance and will be later described.

In the circuit illustrated in FIG. 5, an input voltage Vin is applied toone end of the capacitor C60, a drain of the high-side FET 61, a cathodeof the body diode 61 d, and one end of the capacitance C61.

A control signal Sc-1 is supplied from the oscillation circuit 60 to agate of the high-side FET 61. The high-side FET 61 is turned on or offin accordance with the control signal Sc-1. A control signal Sc-2 issupplied from the oscillation circuit 60 to a gate of the low-side FET62. The low-side FET 62 is turned on or off in accordance with thecontrol signal Sc-2.

A source of the high-side FET 61, an anode of the body diode 61 d, theother end of the capacitance C61, a drain of the low-side FET 62, acathode of body diode 62 d, one end of the capacitance C62, one end ofthe coil L51, and one end of the capacitance C51 are connected with oneanother.

Each of the other end of the coil L51 and the other end of thecapacitance C51 is connected with one end of the capacitor C52.

The other end of the capacitor C60, a source of the low-side FET 62, ananode of the body diode 62 d, the other end of the capacitance C62, andthe other end of the capacitor C52 are electrically grounded.

Now, the following description will discuss a state in which the controlsignal Sc-2 has caused the low-side FET 62 to be turned off and afreewheel current flows through the body diode 61 d of the high-side FET61 in the circuit illustrated in FIG. 5.

In this state, the capacitance C61 is present parasitically at thehigh-side FET 61. Likewise, the capacitance C62 is present parasiticallyat the low-side FET 62 and the capacitance C51 is present parasiticallyat the coil L51.

In a case where the low-side FET 62 is turned on in this state by meansof the control signal Sc-2, a reverse recovery current of the high-sideFET 61 flows in a route indicated by the broken line L1 with an arrow inthe FIG. 5.

A maximum value of the reverse recovery current of the high-side FET 61depends on a rate of change di/dt of an electric current which wasflowing until right before the reverse recovery current flows. Ingeneral, the maximum value increases as the rate of change di/dtincreases.

When the body diode 61 d of the high-side FET 61 is turned off, chargingor discharging is carried out at each of the parasitic capacitances (thecapacitances C51, C61, and C62) connected with the drain of the low-sideFET 62. A path of a charging current of and a discharge current of thecapacitance C51 is indicated by the solid line L2 with an arrow. A pathof a charging current of the capacitance C61 is indicated by the solidline L3 with an arrow. A path′ of the discharge current of thecapacitance C62 is indicated by the solid line L4 with an arrow. Amagnitude of each of the currents (discharge current or chargingcurrent) is in proportion to a rate of change dv/dt of the input voltageVin.

In the circuit illustrated in FIG. 5, an inductance is presentparasitically at a path of an electric current. A change in electriccurrent in a parasitic inductance causes a change in electric potentialof a node provided on the path or causes a change in magnetic fieldaround the path. A change in electric potential of the node becomes asource of conductive noise at a terminal to which the input voltage Vinis supplied. A change in magnetic field around the path becomes a sourceof radiation noise which is radiated into space.

Therefore, in order to achieve good EMC by reducing noise, it iseffective to reduce (i) a change in reverse recovery current and (ii) achange in charging current and a change in discharge current.

In order to reduce the change in reverse recovery current, it iseffective to reduce (i) the rate of change di/dt of the charging currentand the rate of change di/dt of the discharge current or (ii) dependencyon the rate of change di/dt of the charging current and dependency onthe rate of change di/dt of the discharge current. In order to reducethe change in charging current and the change in discharge current(i.e., the rate of change di/dt of the charging current and the rate ofchange di/dt of the discharge current), it is only necessary to reduced²v/dt². In order to reduce d²v/dt², it is effective to reduce dv/dt.

In general, in a case where a design is made so as to reduce dv/dt at atime when one of two FETs is turned on, di/dt of a diode connected withthe other of the two FETs (a body diode of the other FET) also becomessmall.

As described above, in order to achieve good EMC by reducing noisegenerated in a case of using a semiconductor device configured by use ofcascode connection, it is only necessary to reduce a voltage change ratedv/dt. However, an excessive reduction in voltage change rate dv/dtcauses an increase in switching loss. Therefore, it is necessary to setan optimum dv/dt (well-balanced dv/dt) by taking EMC and switching lossinto consideration.

The following description will discuss, with reference to FIG. 2,measurement of a reverse recovery characteristic of the semiconductordevice 1 in accordance with the present embodiment.

(Experiment for Measuring Reverse Recovery Characteristic)

(Measuring Device 30)

FIG. 2 is a circuit diagram of a measuring device 30 for measuring areverse recovery characteristic of the semiconductor device 1 inaccordance with the present embodiment. The measuring device 30 includesa voltage source V30, a capacitor C30, an ammeter I30, a coil L30, asignal generator OS30, and a device FET 25.

In the semiconductor device 1, the gate of the MOSFET 4 and the sourceof the MOSFET 4 are short-circuited. In this case, the source of theMOSFET 4 functions as an anode of a diode and the drain of the MOSFET 4functions as a cathode of the diode. Accordingly, the MOSFET 4 exhibitsdiode characteristics. The circuit illustrated in FIG. 2 is a circuitfor measuring a reverse recovery characteristic of the diode constitutedby the MOSFET 4.

In the measuring circuit 30 illustrated in FIG. 2, an output (+) of thevoltage source V30 is connected with one end of the capacitor C30, anoutput of the ammeter I30, and one end of the coil L30. The other end ofthe coil L30, the one end of the resistor Rgs, the cathode of the diodeD1, the source of the MOSFET 4, the anode of the body diode 4 d, thegate of the MOSFET 4, and a drain of the device FET 25 are connectedwith one another.

The other end of the resistor Rgs is connected with the anode of thediode D1 and the gate of the FET 3. The source of the FET 3 is connectedwith the drain of the MOSFET 4 and the cathode of the body diode 4 d.The drain of the FET 3 is connected with an input of the ammeter I30.

An input (−) of the voltage source V30, the other end of the capacitorC30, and a source of the device FET 25 are electrically grounded.

(Measurement of Reverse Recovery Characteristic)

The following description will discuss measurement of a reverse recoverycharacteristic by use of the circuit illustrated in FIG. 2.

First, in the measuring circuit illustrated in FIG. 2, a high levelsignal is supplied from the signal generator OS30 to a gate of thedevice FET 25, so that the device FET 25 is turned on. This causes apower supply voltage (an output voltage of the voltage source V30) tocause an electric current to flow through the coil L30. Meanwhile, thesemiconductor device 1 is in an off-state. That is, both of two FETs inthe semiconductor device 1 are in an off-state.

In a case where the device FET 25 is turned off in a state in which theelectric current flows through the coil L30, an electric potential ofthe drain of the device FET 25 (i.e., an electric potential of thesource of the semiconductor device 1) increases.

When the electric potential of the source of the semiconductor device 1becomes substantially equal to the power supply voltage, the normally-ontype FET 3 conducts. When the FET 3 conducts, a gate drive current Ig1flows in the following route: the source of the semiconductor device1→the resistor Rgs→the gate of the FET 3. Note that the normally-offtype MOSFET 4 is still off in this state.

When the electric potential of the source of the semiconductor device 1increases to about a voltage equal to a sum of (i) a forward voltage ofthe body diode 4 d of the normally-off type MOSFET 4 and (ii) the powersupply voltage, the body diode 4 d is turned on, so that thesemiconductor device 1 is turned on. In response to the semiconductordevice 1 being turned on, an electric current is regenerated, so thatthe electric potential of the source of the semiconductor device 1 stopsincreasing. A flow of a regenerated current which is regenerated whenthe semiconductor device 1 is turned on takes the following route: theone end of the coil L30→the other end of the coil L30→the source of theMOSFET 4 the drain of the MOSFET 4→the source of the FET 3→the drain ofthe FET 3→the ammeter I30.

This is an early stage of the measurement of the reverse recoverycharacteristic.

In order to measure the reverse recovery characteristic, the device FET25 is turned on again in a state in which the regenerated current flows.This causes a sharp decrease in the regenerated current flowing in thesemiconductor device 1. A rate of decrease of the regenerated current isdi/dt.

When the regenerated current becomes zero, an electric current that isreverse to the regenerated current (i.e., a reverse recovery current (Irin FIG. 6)) flows. A flow of the reverse recovery current takes thefollowing route: the ammeter I30→the drain of the FET 3→the source ofthe FET 3→the drain of the MOSFET 4→the source of the MOSFET 4→the drainof the device FET 25→the source of the device FET 25→the ground (GND).

Since the semiconductor device 1 includes the diode D1, a gate drivecurrent Ig2 flows at the same time as the body diode 4 d of the MOSFET 4is turned off. A flow of the gate drive current Ig2 takes the followingroute: the ammeter I30→the drain of the FET 3→the gate of the FET 3→thediode D1→the drain of the device FET 25→the source of the device FET25→the ground (GND). When a gate-source voltage of the FET 3 becomes notmore than a threshold due to the gate drive current Ig2, the FET 3 isturned off and the reverse recovery current becomes zero.

As described above, the gate drive current Ig2 flows via the diode D1 inthe semiconductor device 1. Because of this, a decrease in electricpotential of the drain of the device FET 25 (i.e., electric potential ofthe source of the semiconductor device 1) occurs early as compared witha conventional semiconductor device. Accordingly, the semiconductordevice 1 in accordance with the present embodiment is turned off morespeedily than the conventional semiconductor device. That is, thesemiconductor device 1 in accordance with the present embodimentachieves a reverse recovery characteristic better than that of theconventional semiconductor device.

In addition, since the semiconductor device 1 includes the diode D1, itis not necessary to reduce, for the purpose of improving the reverserecovery characteristic, a resistance of the resistor Rgs connected inparallel with the diode D1. That is, it is only necessary that theresistance of the resistor Rgs be set to a value that is large enough toachieve good EMC (and not so large as to increase switching loss toomuch). This makes it possible to achieve good EMC and reduce theswitching loss in the semiconductor device 1.

Further, unlike the conventional semiconductor device, there is no needof providing a negative power source (a voltage source for supplying anegative voltage) in order to cause the normally-on type FET 3 tooperate. This makes the semiconductor device 1 less expensive than theconventional semiconductor device.

Therefore, it is possible to provide the semiconductor device 1 whichcan achieve a good reverse recovery characteristic and good EMC at thesame time and is less expensive than the conventional semiconductordevice.

(Diode D1)

The diode D1 in accordance with the present embodiment can normally be aPN-junction diode (a diode obtained by joining a P-type semiconductorand a N-type semiconductor to each other).

Alternatively, the diode D1 can be a Schottky junction diode obtained byjoining a source electrode of the MOSFET 4 with a semiconductor (e.g., aP-type semiconductor or an N-type semiconductor).

In the Schottky junction diode, a conductor (the source electrode of theMOSFET 4) is provided in place of one of the semiconductors in thePN-junction diode. This allows the number of components to be reducedand, accordingly, allows an implementation cost to be reduced.

In addition, a diode D1 provided as the Schottky junction diode isturned on in less time than that required to turn on a diode D1 providedas the PN-junction diode. This makes it possible to cause the gate drivecurrent Ig2 to flow sooner so as to turn off the semiconductor device 1speedily.

(Reverse Recovery Current and Reverse Recovery Time)

FIG. 6 is a waveform chart showing that the semiconductor device 1 inaccordance with the present embodiment has a reverse recovery current Irand reverse recovery time tr which are reduced as compared with those ofthe conventional semiconductor device 121′. (a) of FIG. 6 is a waveformchart of the conventional semiconductor device 121′ and (b) of FIG. 6 isa waveform chart of the semiconductor device 1 in accordance with thepresent embodiment. As is clear from (a) and (b) of FIG. 6, thesemiconductor device 1 in accordance with the present embodiment has areverse recovery current Ir that is reduced as compared with theconventional semiconductor device 121′. The reverse recovery time tr isalso reduced in the semiconductor device 1 in accordance with thepresent embodiment.

(Specification of FET)

FIG. 7 is a view showing an example of a specification of thenormally-on type FET 3. Due to being of a normally-on type, thenormally-on type FET 3 has a gate threshold voltage (a threshold of avoltage to be supplied to the gate; a threshold voltage) which is anegative voltage (MIN: −5.0 V, MAX: −3.0 V). As such, the normally-ontype FET 3 is turned on in a case where a voltage of 0 V is supplied tothe gate.

FIG. 8 is a view showing an example of a specification of thenormally-off type MOSFET 4. Due to being of a normally-off type, thenormally-off type MOSFET 4 has a gate threshold voltage (a threshold ofa voltage to be supplied to the gate; a threshold voltage) which is apositive voltage (MIN: 1.0 V, MAX: 2.5V). As such, the normally-off typeMOSFET 4 is turned off in a case where a voltage of 0 V is supplied tothe gate.

(Parameters of Semiconductor Device 1)

In the semiconductor device 1, time required to turn on the FET 3(turn-on time) and time required to turn off the FET 3 (turn-off time)are each determined based on a time constant obtained by multiplying aninput capacitance of the FET 3 by a resistance of the resistor Rgs. Anoptimum value of the time constant is determined, at the time ofdesigning the semiconductor device 1, by determining a drain-gatecapacitance or an internal gate resistance.

In the semiconductor device 1, (i) the gate drive current Ig1 flowsthrough the resistor Rgs at the time of turning on and (ii) the gatedrive current Ig2 flows through the diode D1 at the time of turning off.This allows a time constant at the time of turning on and a timeconstant at the time of turning off to be different from each other.

When the FET 3 is turned on, the following Formula (1) is met between(i) parameters of the semiconductor device 1 and a rate of changedI_(D)/dt_((on)) (i.e., di/dt) of an electric current I_(D). Theelectric current I_(D) is an electric current which flows from thesource of the semiconductor device 1 to the drain of the semiconductordevice 1.

$\begin{matrix}\left\lbrack {{Formula}\mspace{14mu} 1} \right\rbrack & \; \\{\frac{I_{D}}{t_{({on})}} \propto \frac{1}{R_{gs}\left( {C_{gs} + C_{d\; g}} \right)}} & (1)\end{matrix}$

Like the electric current I_(D), a relational expression is met alsobetween (i) parameters of the semiconductor device 1 and (ii) a rate ofchange dV_(D)/dt_((on)) (i.e., dv/dt) of a voltage V_(D), which is avoltage supplied to the source of the semiconductor device 1. Thefollowing Formula (2) is the relational expression.

$\begin{matrix}\left\lbrack {{Formula}\mspace{14mu} 2} \right\rbrack & \; \\{\frac{V_{D}}{t_{({on})}} \propto {- \frac{1}{\left( {{{gR}_{gs}C_{dg}} + C_{D{({all})}}} \right)}}} & (2)\end{matrix}$

In Formulae (1) and (2), Cgs represents a gate-source capacitance andCdg represents a drain-gate capacitance.

g represents a trans conductance of the FET. C_(D(all)) is a sum of allof the parasitic capacitances connected with the drain of thesemiconductor device 1, and includes a drain-source capacitance, adrain-gate capacitance, a coil parasitic capacitance, and the like.

It is clear from Formulae (1) and (2) that di/dt and dv/dt both decreaseas the resistance of the resistor Rgs is increased.

Next, when the FET 3 is tuned off, the following Formulae (3) and (4)are met between (i) parameters of the semiconductor device 1 and (ii) arate of change dV_(D)/dt_((off)) of the voltage VD.

$\begin{matrix}\left\lbrack {{Formula}\mspace{14mu} 3} \right\rbrack & \; \\{\frac{V_{D}}{t_{({off})}} \propto \frac{1}{\left( {{{gR}_{gs}C_{dg}} + C_{D{({all})}}} \right)}} & (3) \\\left\lbrack {{Formula}\mspace{14mu} 4} \right\rbrack & \; \\{\frac{V_{D}}{t_{({off})}} \propto \frac{1}{C_{D{({all})}}}} & (4)\end{matrix}$

Formula (3) corresponds to a case in which Rgs or Cdg is large and theFET 3 is turned off slowly (a case in which R_(gs)C_(dg)I_(L) is largerthan C_(D(all))VTH).

IL is an electric current that flows while the semiconductor device isin an on-state. VTH is a threshold voltage of the FET 3.

Formula (4) corresponds to a case in which Rgs or Cdg is small and theFET 3 is turned off slowly (a case in which R_(gs)C_(dg)I_(L) is notmore than C_(D(all))VTH).

As understood from Formulae (3) and (4), the rate of changedV_(D)/dt_((off)) decreases, according to Formula (3), as Rgs or Cdg isincreased and, as a result, the rate of change dV_(D)/dt_((off)) is inproportion to a reciprocal of C_(D(all)) as shown in Formula (4).

Note that the resistor Rgs can be fabricated on a chip of thesemiconductor in the present Embodiment 1. This eliminates the need ofmounting a resistor to a substrate when the semiconductor device 1(composite element) is assembled. Accordingly, the number of componentsto be mounted on the substrate is reduced. This makes it possible toreduce costs.

An element manufactured by fabricating the resistor Rgs on the chip ofthe semiconductor is equivalent of the resistor Rgs. The element thusmanufactured has electrical properties in which a semiconductorcharacteristic may be observed which is deviated from an idealresistance characteristic.

Second Embodiment

The following description will discuss, with reference to FIGS. 3 and 4,another embodiment, Embodiment 2, of the present invention. Note thatconfigurations of Embodiment 2 other than configurations to be describedin Embodiment 2 are the same as those of early-described Embodiment 1.For easy explanation, the same reference signs will be given to memberseach having the same function as a member illustrated in the figures ofEmbodiment 1, and descriptions on such a member will be omitted.

(Configuration of Semiconductor Device 11)

FIG. 3 is a circuit diagram illustrating a semiconductor device 11 inaccordance with the present embodiment. The semiconductor device 11(i.e., a composite element) includes an FET 3, a MOSFET 4, a resistorRgs, a diode D2, and a capacitor Cdg, J.

In the semiconductor device 11 illustrated in FIG. 3, a source of theMOSFET 4 and one end of the resistor Rgs are connected with each other.A diode 4 d is a body diode which is present parasitically at the MOSFET4.

A drain of the MOSFET 4, a cathode of the body diode 4 d, and a sourceof the FET 3 are connected with one another.

The other end of the resistor Rgs, an anode of the diode D2, and a gateof the FET 3 are connected with one another.

A cathode of the diode D2 is connected with one end of the capacitorCdg, J.

The other end of the capacitor Cdg, J and a drain of the FET 3 areconnected with each other.

(Experiment for Measuring Reverse Recovery Characteristic)

(Measuring Circuit 30)

FIG. 4 is a circuit diagram illustrating a measuring circuit 30 formeasuring a reverse recovery characteristic of the semiconductor device11 in accordance with the present embodiment. The measuring circuit 30has the same configuration as that of the measuring circuit illustratedin FIG. 2, except that a subject to be measured is different. That is,the subject to be measured by the measuring circuit 30 illustrated inFIG. 4 is the semiconductor device 11, and the measuring circuit 30 is acircuit for measuring a reverse recovery characteristic of a diodeconstituted by the MOSFET 4 of the semiconductor device 11.

In the measuring circuit 30 illustrated in FIG. 2, the other end of thecoil L30, the one end of the resistor Rgs, the source of the MOSFET 4, agate of the MOSFET 4, and a drain of a device FET 25 are connected withone another.

The other end of the resistor Rgs is connected with the anode of thediode D2 and a gate of the FET 3.

The cathode of the diode D2 is connected with the one end of thecapacitor Cdg, J. The other end of the capacitor Cdg, J and the drain ofthe FET 3 are connected with an input of an ammeter I30. Otherconnections are the same as those in the measuring circuit 30illustrated in FIG. 2.

(Measurement of Reverse Recovery Characteristic)

The following description will discuss measurement of a reverse recoverycharacteristic by use of the circuit illustrated in FIG. 4.

First, in the measuring circuit illustrated in FIG. 4, a high levelsignal is supplied from a signal generator OS30 to a gate of the deviceFET 25, so that the device FET 25 is turned on. This causes a powersupply voltage (an output voltage of the voltage source V30) to cause anelectric current to flow through the coil L30. Meanwhile, thesemiconductor device 11 is in an off-state. That is, both of two FETs inthe semiconductor device 11 are in an off-state.

In a case where the device FET 25 is turned off in a state in which theelectric current flows through the coil L30, an electric potential ofthe drain of the device FET 25 (i.e., an electric potential of a sourceof the semiconductor device 1) is increased.

When the electric potential of the source of the semiconductor device 1becomes substantially equal to the power supply voltage, the normally-ontype FET 3 conducts.

When the electric potential of the source of the semiconductor device 1increases to about a voltage equal to a sum of (i) a forward voltage ofthe body diode 4 d of the normally-off type MOSFET 4 and (ii) the powersupply voltage, the body diode 4 d is turned on, so that thesemiconductor device 11 is turned on. In response to the semiconductordevice 11 being turned on, an electric current is regenerated, so thatthe electric potential of the source of the semiconductor device 1 stopsincreasing. A flow of a regenerated current which is regenerated whenthe semiconductor device 11 is turned on takes the following route: theone end of the coil L30 the other end of the coil L30→the source of theMOSFET 4→the drain of the MOSFET 4→the source of the FET 3→the drain ofthe FET 3→the ammeter I30.

This is an early stage of the measurement of the reverse recoverycharacteristic.

In order to measure the reverse recovery characteristic, the device FET25 is turned on again in a state in which the regenerated current flows.This causes a gradual decrease in the regenerated current flowing in thesemiconductor device 11. A rate of decrease of the regenerated currentis di/dt.

When the regenerated current becomes zero, an electric current that isreverse to the regenerated current (i.e., a reverse recovery current (Irin FIG. 6)) flows. A flow of the reverse recovery current takes thefollowing route: the ammeter I30→the drain of the FET 3→the source ofthe FET 3→the drain of the MOSFET 4→the source of the MOSFET 4→the drainof the device FET 25→source of the device FET 25→a ground (GND).

The semiconductor device 1 includes the diode D2 and the capacitor Cdg,J. As such, at the same time as the reverse recovery current flows, agate drive current Ig flows in the following path: the ammeter I30→thecapacitor Cdg, J→a parasitic capacitance of the diode D2→the resistorRgs→the drain of the device FET 25→the source of the device FET 25→theground (GND).

When the gate drive current Ig flows, the diode D2 is in an off-state.As such, the gate drive current Ig flows through a capacitor constitutedby connecting the parasitic capacitance of the diode D2 and thecapacitor Cdg, J in series.

The parasitic capacitance of the diode D2 is designed to be smaller thana capacitance of the capacitor Cdg, J. As such, the parasiticcapacitance of the diode D2 accounts for a large proportion of thecapacitor constituted by means of the serial connection (the parasiticcapacitance of the diode D2 is dominant). That is, the parasiticcapacitance of the diode D2 brings an effect similar to that broughtabout by a capacitor obtained by connecting the capacitor Cdg, J with acapacitor having a small capacitance.

As described above, the reverse recovery current and the gate drivecurrent Ig flows simultaneously in the semiconductor device 1. As such,a decrease in electric potential of the drain of the device FET 25(i.e., electric potential of the source of the semiconductor device 1),which decrease starts at the same time as the body diode 4 d of theMOSFET 4 is turned off (i.e., recovers), occurs early as compared withthe conventional semiconductor device. Accordingly, the semiconductordevice 11 in accordance with the present embodiment is turned off morespeedily than the conventional the semiconductor device. That is, thesemiconductor device 11 in accordance with the present embodiment canachieve a reverse recovery characteristic better than that of theconventional semiconductor device.

The decrease in electric potential of the source of the semiconductordevice 1 causes the body diode 4 d of the MOSFET 4 to be turned off.This causes an increase in drain-source voltage of the MOSFET 4.

When a gate-source voltage of the FET 3 exceeds a negative thresholdvoltage and approaches 0 V, the FET 3 is turned off.

The electric potential of the drain of the device FET 25 (i.e., theelectric potential of the source of the semiconductor device 1)decreases to a ground voltage. To be exact, the electric potential ofthe drain of the device FET 25 (i.e., the electric potential of thesource of the semiconductor device 1) decreases to an on-voltage of thedevice FET 25.

In this manner, it is possible to observe the reverse recovery currentfrom a time when the semiconductor device 11 is in an on-state until thesemiconductor device 11 is turned off. That is, it is possible tomeasure the reverse recovery characteristic of the semiconductor device11.

As described above, the semiconductor device 11 in accordance with thepresent embodiment includes the diode D2 and the capacitor Cdg, J. Assuch, in a semiconductor device including two FETs which arecascode-connection with each other, a reverse recovery current flowswhen an electric current flowing from a source of the semiconductordevice to a drain of the semiconductor device is shut off. The reverserecovery current is a current which flows from the drain of thesemiconductor device to the source of the semiconductor device. Inaddition to the reverse recovery current, the gate drive current Igflows through the diode D2, the capacitor Cdg, J and the resistor Rgs.

A flow of the gate drive current Ig takes the following route: thecapacitor Cdg, J→the parasitic capacitance of the diode D2→the resistorRgs→the source of the MOSFET 4 (the drain of the device FET 25)→thesource of the device FET 25→the ground (GND).

This allows the semiconductor device 11 to be turned off more speedilythan the conventional semiconductor device. That is, a switching speedof the semiconductor device 11 increases.

Therefore, in the semiconductor device 11 in accordance with the presentembodiment, time during which the reverse recovery current flows isshorter than that in the conventional semiconductor device.Consequently, it becomes possible to achieve a good reverse recoverycharacteristic.

In addition, since the semiconductor device 11 includes the diode D2 andthe capacitor Cdg, J so as to cause the gate drive current Ig to flow,it becomes unnecessary to reduce, for the purpose of improving thereverse recovery characteristic, the capacitance of the capacitor Cdg,J. That is, it is only necessary that the capacitance of the capacitorCdg, J be set to a value that is large enough to achieve good EMC (thatis, not so large as to increase switching loss too much). This makes itpossible to achieve good EMC and reduce the switching loss in thesemiconductor device 11.

Further, unlike the conventional semiconductor device, there is no needof providing a negative power source (a voltage source for supplying anegative voltage) in order to cause the normally-on type FET 3 tooperate. This makes the semiconductor device 11 less expensive than theconventional semiconductor device.

Therefore, it is possible to provide the semiconductor device 11 whichcan achieve a good reverse recovery characteristic and good EMC at thesame time and is less expensive than the conventional semiconductordevice.

(Parameters of Semiconductor Device 11)

In the semiconductor device 11 in accordance with the presentembodiment, time required to turn on the FET 3 (turn-on time) and timerequired to turn off the FET 3 (turn-off time) are each determined basedon a time constant obtained by multiplying an input capacitance of theFET 3 by a resistance of the resistor Rgs, as in the semiconductordevice 1 of Embodiment 1.

As such, when the FET 3 is turned on, the formulae (1) through (4)described in Embodiment 1 are met with respect to parameters of thesemiconductor device 11.

Note that the semiconductor device 11 in accordance with the presentembodiment includes the capacitor Cdg, J. Addition of the capacitor Cdg,J brings about an effect substantially equal to that brought about by anincrease in drain-gate capacitance Cdg.

As such, as understood from Formula (1), the rate of changedI_(D)/dt_((on)) (i.e., di/dt) of an electric current ID decreases dueto the capacitor Cdg, J when the FET 3 is turned on. Similarly, asunderstood from Formula (2), the rate of change dV_(D)/dt_((on)) dv/dt)of a voltage V_(D) decreases due to the capacitor Cdg, J.

As understood from Formulae (3) and (4), when the FET 3 is turned off,the rate of change dV_(D)/dt_((off)) decreases, according to Formula(3), if the capacitor Cdg, J is added (that is, Cdg is increased) and,as a result, the rate of change dV_(D)/dt_((off)) is in proportion to areciprocal of C_(D(all)) as shown in Formula (4).

(Selection of Time Constant)

Each of the semiconductor device 1 of the First Embodiment and thesemiconductor device 11 of the Second Embodiment is different from theconventional cascode circuit disclosed in Non-patent Literature 1, inthat a diode is added.

By adding the diode, the time constant, based on which the switchingspeed is determined, becomes different between a case in which a turningon is carried out and a case in which a turning off is carried out.Specifically, a time constant in the case of turning off is made smallerthan a time constant in the case of turning on.

This caused an increase in speed of turning off and, accordingly,brought about an improvement in reverse recovery characteristic. Notethat the time constant in the case of turning on can be adjustedindependently of the time constant in the case of turning off (the timeconstant in the case of turning on is adjusted at the time ofdesigning). This makes it possible to select a time constant by takingEMC into consideration.

The following description will concretely discuss significance ofreduction in time constant.

In the semiconductor device 1 of the First Embodiment, a gate drivecurrent flows via the diode D1 in a case of turning off. Because ofthis, the gate drive current brings about an effect similar to thatbrought about by a reduction in resistance of a gate resistance of theFET 3.

Since this causes an increase in gate drive current in the case ofturning off, an electric charge is extracted faster from the inputcapacitance of the FET 3. As a result, switching is carried out faster.

In the semiconductor device 11 of the Second Embodiment, the gate drivecurrent Ig flows via the parasitic capacitance of the diode D2, so thata gate-drain capacitance of the FET 3 is decreased. This causes areduction in input capacitance of the FET 3, so that the number ofelectric charges which are extracted is reduced. As a result, switchingis carried out faster.

In the semiconductor device, the diode can be a Schottky junction diodeformed by joining (i) an electrode of the source of the secondfield-effect transistor and (ii) a semiconductor with each other.

In this case, the second field-effect transistor and the diode can befabricated on the same chip. This makes it possible to reduce a cost ascompared with a case in which the second field-effect transistor and thediode are separately mounted.

In addition, the diode provided as a Schottky junction diode is turnedon in less time than that required to turn on the diode provided as aPN-junction diode. This makes it possible to cause the gate drivecurrent to flow sooner so as to turn off the semiconductor devicespeedily.

In the semiconductor device, the first field-effect transistor cancontain a group III nitride semiconductor. This allows the firstfield-effect transistor to be a normally-on type field-effect transistorand also allows a high resistance to pressure, a high-speed operation, ahigh heat-resistance, and a low on-resistance to be achieved in thefirst field-effect transistor.

In the semiconductor device, the resistor can be fabricated on a chip ofthe semiconductor.

This eliminates the need of mounting a resistor to a substrate when thesemiconductor device (composite element) is assembled. Accordingly, thenumber of components to be mounted on the substrate is reduced. Thismakes it possible to reduce costs.

(Example of Application)

An electronic device of the present invention includes one of thesemiconductor devices 1 and 11. Therefore, the electronic device of thepresent invention (i) can achieve a good reverse recovery characteristicand good EMC at the same time and (ii) is less expensive than aconventional semiconductor device.

The present invention is not limited to the above-described embodimentsbut allows various modifications within the scope of the claims. Anyembodiment obtained by appropriately combining the technical meansdisclosed in the different embodiments will also be included in thetechnical scope of the present invention.

INDUSTRIAL APPLICABILITY

A semiconductor device of the present invention can be applied to anelectronic device. The semiconductor device of the present invention canbe suitably applied to an inverter circuit which has a problem of lossof reverse recovery characteristic.

REFERENCE SIGNS LIST

-   1 and 11: semiconductor device-   3: FET (first field-effect transistor)-   4: MOSFET (second field-effect transistor)-   4 d: body diode-   Cdg, J: capacitor-   Dl: diode-   D2: diode-   Ig: gate drive current-   Ig1: gate drive current-   Ig2: gate drive current-   Ir: reverse recovery current-   Rgs: resistance-   tr: reverse recovery time

1. A semiconductor device comprising: a first field-effect transistorbeing of a normally-on type; a second field-effect transistor being of anormally-off type and having a drain thereof connected with a source ofthe first field-effect transistor; a resistor having one end thereofconnected with a gate of the first field-effect transistor and havingthe other end thereof directly connected with a source of the secondfield-effect transistor; and a diode having an anode thereof connectedwith the gate of the first field-effect transistor and having a cathodethereof directly connected with the source of the second field-effecttransistor, wherein the resistor and the diode are connected in parallelwith each other such that, at a time of turning off of the semiconductordevice, electric currents flow to the resistor and the diode,respectively.
 2. The semiconductor device as set forth in claim 1,wherein the diode is a Schottky junction diode formed by joining (i) anelectrode of the source of the second field-effect transistor and (ii) asemiconductor to each other.
 3. An electronic device comprising asemiconductor device, the semiconductor device including; a firstfield-effect transistor being of a normally-on type; a secondfield-effect transistor being of a normally-off type and having a drainthereof connected with a source of the first field-effect transistor; aresistor having one end thereof connected with a gate of the firstfield-effect transistor and having the other end thereof directlyconnected with a source of the second field-effect transistor; and adiode having an anode thereof connected with the gate of the firstfield-effect transistor and having a cathode thereof directly connectedwith the source of the second field-effect transistor, wherein theresistor and the diode are connected in parallel with each other suchthat, at a time of turning off of the semiconductor device, electriccurrents flow to the resistor and the diode, respectively.